1. Technical Field of the Invention
The present invention relates generally to the field of integrated circuits and, more particularly, to a method, system and apparatus of failsafe detection for differential receiver circuits.
2. Background of the Invention
For data transmission it is important to have bus drivers and bus receivers that allow devices to communicate quickly, efficiently, and accurately. This data transmission may occur within a computer system, for example. One common technique for implementation of data transmission within a computer bus uses differential signaling technology to communicate between devices in a computer system. A variety of differential signaling standards exist, such as low voltage differential signaling (LVDS), high voltage differential signaling (HVDS) and others. Of course, such differential signaling may also be used for other long distance data transmission.
Typically, a LVDS driver includes a current source that drives the differential pair lines in opposition to each other. The differential receiver has a high DC impedance, so that the majority of driver current flows across a termination resistor generating a voltage drop across the receiver input. When the driver switches, it changes the direction of current flow across the resistor, thereby creating a valid “1” or “0” logic state. To help ensure reliability, differential receivers may have a failsafe feature that helps to insure the output to be in a known logic state under certain fault conditions. These fault conditions can include open, shorted, or terminated receiver input.
In interface circuits, and receiver circuits in general, it is advantageous to be able to detect failure conditions on the bus and react appropriately. Open circuit faults in general can cause problems in interface systems, sending receivers into unknown or oscillating states and generally causing havoc in digital systems. Failsafe circuits seek to detect such fault conditions and reactively apply a known state to the receiver outputs. It is also desirable that such failsafe detection circuits be capable of signaling or setting a fault bit so that digital circuits may deal with the fault conditions in a manner appropriate for the specific application.
Although current failsafe circuits are capable of accurately detecting/signaling on occurrence of the aforementioned fault conditions, they also signal false alarms in certain signal noise related events leading to uncertainty in the state of the receiver output.